Parametric Test参数测试
Parametric test is an electrical measurement step that checks device parameters such as threshold voltage, leakage current, and sheet resistance against specification limits. In semiconductor translation, the term appears in test program documents, wafer probe reports, characterization reports, yield analysis files, and design validation data that distinguish parametric failures from functional failures and help monitor process variation across wafers and lots.
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Where this term appears
Translators encounter parametric-test in ATE test program documentation, wafer acceptance criteria, and datasheet tables that list tested parameters and limits. It often appears alongside functional test and binning, so consistency in terminology is important. In yield reports, parametric test results explain process drift and parametric yield loss.
Translation checks
A frequent mistake is translating parametric-test as '参数检测' or '参数检查' in a way that sounds like a casual check rather than a formal electrical measurement. In test documentation, this can blur the line between datasheet characterization and production test. It may also be confused with functional test, leading readers to misinterpret which failure type is being analyzed.
Keep the term aligned across your files
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Provide approved terms and previous translations with the source files. Agree how variants, ambiguous wording and revisions will be reviewed. Terminology maintenance and any termbase handback are confirmed in the project scope. See the 8-step AI + expert workflow.
Related document experience
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Read the published project →Published scope shows related industry experience; it does not confirm that this specific term was used or reviewed in the project.
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