Overlay error is the measured misalignment between a newly patterned layer and previously patterned layers on a wafer, expressed as a vector with magnitude and direction. It appears in lithography process specifications, overlay metrology reports, process control charts, and yield-analysis documents where layer-to-layer registration is compared against tolerance limits; the term also occurs in scanner/stepper alignment recipes and in design rules that budget overlay for multi-patterning steps.
In localization, overlay error appears in lithography process specifications, metrology tool reports, statistical process control dashboards, and scanner alignment recipe documentation. It is also common in failure-analysis and yield-learning texts where engineers discuss correction models, sampling plans, and root causes of layer-to-layer misregistration. Translators often see it with terms such as residual overlay, correctables, and modeling coefficients.
A common mistake is translating overlay error as '覆盖误差' or '重叠错误,' which suggests a software layer problem rather than wafer pattern misalignment. Another issue is treating it as a scalar percentage when it is usually a vector; losing direction and per-axis data in translated tables can misrepresent process capability and alignment correction decisions.
Terminology must stay consistent across datasheets, design kits and patent filings. A single inconsistent parameter can propagate into fabrication decisions or weaken a patent claim, and IP confidentiality applies to every document in the chain.
Angel Translation locks terms like this into a project terminology base before expert review begins, so the same source term resolves to the same target term across every document in a submission — and stays consistent in the next revision. See the 8-step AI + expert workflow.
Send us the files. Acknowledged in 4 hours, quoted in 24.
Request a Quote →Semiconductor solutions →